An On-Chip Test Clock Control Scheme for Multi-Clock At-Speed Testing

Xiaoxin Fan, Yu Hu 0001, Laung-Terng Wang. An On-Chip Test Clock Control Scheme for Multi-Clock At-Speed Testing. In 16th Asian Test Symposium, ATS 2007, Beijing, China, October 8-11, 2007. pages 341-348, IEEE, 2007. [doi]

Abstract

Abstract is missing.