Digital Leakage Compensation for a Low-Power and Low-Jitter 0.5-to-5GHz PLL in 10nm FinFET CMOS Technology

Yongping Fan, Bo Xiang, Dan Zhang, James S. Ayers, Kuan-Yueh James Shen, Andrey Mezhiba. Digital Leakage Compensation for a Low-Power and Low-Jitter 0.5-to-5GHz PLL in 10nm FinFET CMOS Technology. In IEEE International Solid- State Circuits Conference, ISSCC 2019, San Francisco, CA, USA, February 17-21, 2019. pages 320-322, IEEE, 2019. [doi]

Abstract

Abstract is missing.