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A speed oriented fully automatic layout program for random logic VLSI devices

A. Feller, Richard B. Noto. A speed oriented fully automatic layout program for random logic VLSI devices. In Sakti P. Ghosh, editor, American Federation of Information Processing Societies: 1978 National Computer Conference, June 5-8, 1978, Anaheim, CA, USA. Volume 47 of AFIPS Conference Proceedings, pages 303-311, AFIPS Press, 1978.

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