An FPGA Design Project: Creating a PowerPC Subsystem Plus User Logic

Rod Blaine Foist, André Ivanov, Robin Turner. An FPGA Design Project: Creating a PowerPC Subsystem Plus User Logic. In IEEE International Conference on Microelectronic Systems Education, MSE '07, San Diego, CA, USA, June 3-4, 2007. pages 127-128, IEEE Computer Society, 2007. [doi]

Abstract

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