Yoshichika Fujioka, Michitaka Kameyama. Configuration memory size reduction of a Dynamically Reconfigurable Processor based on a register-transfer-level packet data transfer scheme. In International SoC Design Conference, ISOCC 2012, Jeju Island, South Korea, November 4-7, 2012. pages 235-238, IEEE, 2012. [doi]
Abstract is missing.