Scheduling-aware interconnect synthesis for FPGA-based Multi-Processor Systems-on-Chip - researchr publication

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Edoardo Fusella, Alessandro Cilardo, Antonino Mazzeo. Scheduling-aware interconnect synthesis for FPGA-based Multi-Processor Systems-on-Chip. In 25th International Conference on Field Programmable Logic and Applications, FPL 2015, London, United Kingdom, September 2-4, 2015. pages 1-2, IEEE, 2015. [doi]

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