A unified flagged prefix constant addition-subtraction scheme for design of area and power efficient binary floating-point and constant integer arithmetic circuits

Soumya Ganguly, Abhishek Mittal, Syed Ershad Ahmed, M. B. Srinivas. A unified flagged prefix constant addition-subtraction scheme for design of area and power efficient binary floating-point and constant integer arithmetic circuits. In 2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014, Ishigaki, Japan, November 17-20, 2014. pages 69-72, IEEE, 2014. [doi]

Abstract

Abstract is missing.