Michael Gautschi, Michael Schaffner, Frank K. Gürkaynak, Luca Benini. 4.6 A 65nm CMOS 6.4-to-29.2pJ/FLOP@0.8V shared logarithmic floating point unit for acceleration of nonlinear function kernels in a tightly coupled processor cluster. In 2016 IEEE International Solid-State Circuits Conference, ISSCC 2016, San Francisco, CA, USA, January 31 - February 4, 2016. pages 82-83, IEEE, 2016. [doi]
Abstract is missing.