Synthesis of Low Power CED Circuits Based on Parity Codes

Shalini Ghosh, Sugato Basu, Nur A. Touba. Synthesis of Low Power CED Circuits Based on Parity Codes. In 23rd IEEE VLSI Test Symposium (VTS 2005), 1-5 May 2005, Palm Springs, CA, USA. pages 315-320, IEEE Computer Society, 2005. [doi]

Abstract

Abstract is missing.