A Configurable and Area Efficient Technique for Implementing Isolation Cells in Low Power SoC

Prokash Ghosh, Jyotirmoy Ghosh. A Configurable and Area Efficient Technique for Implementing Isolation Cells in Low Power SoC. In Brajesh Kumar Kaushik, Sudeb Dasgupta, Virendra Singh, editors, VLSI Design and Test - 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017, Revised Selected Papers. Volume 711 of Communications in Computer and Information Science, pages 619-627, Springer, 2017. [doi]

Abstract

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