A compact 14-bit 110 KS/s two-stage incremental ΣΔ ADC for CMOS image sensors

Francesco Giorgio, Bhaskar Choubey. A compact 14-bit 110 KS/s two-stage incremental ΣΔ ADC for CMOS image sensors. In IEEE 60th International Midwest Symposium on Circuits and Systems, MWSCAS 2017, Boston, MA, USA, August 6-9, 2017. pages 1180-1183, IEEE, 2017. [doi]

Abstract

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