Robust Transistor Sizing for Improved Performances in Digital Circuits using Optimization Algorithms

Prateek Gupta, Harshini Mandadapu, Shirisha Gourishetty, Zia Abbas. Robust Transistor Sizing for Improved Performances in Digital Circuits using Optimization Algorithms. In 20th International Symposium on Quality Electronic Design, ISQED 2019, Santa Clara, CA, USA, March 6-7, 2019. pages 85-91, IEEE, 2019. [doi]

Abstract

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