Circuit technique for improving propagation delay times in CMOS source-coupled logic circuits - researchr publication

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Yuki Hagita, Kiyoshi Ishii. Circuit technique for improving propagation delay times in CMOS source-coupled logic circuits. In International Symposium on Intelligent Signal Processing and Communications Systems, ISPACS 2012, Tamsui, New Taipei City, Taiwan, November 4-7, 2012. pages 615-618, IEEE, 2012. [doi]

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