A 64×32bit 4-read 2-write low power and area efficient register file in 65nm CMOS - researchr publication

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Jun Han, Xingxing Zhang, Yi Li, Baoyu Xiong, Yuejun Zhang, Zhang Zhang, Zhiyi Yu, Jun Han, Xu Cheng, Xiaoyang Zeng. A 64×32bit 4-read 2-write low power and area efficient register file in 65nm CMOS. IEICE Electronic Express, 9(16):1355-1361, 2012. [doi]

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