Automatic generation of Verilog bus transactors from natural language protocol specifications

Ian G. Harris. Automatic generation of Verilog bus transactors from natural language protocol specifications. In 2012 IEEE International High Level Design Validation and Test Workshop, HLDVT 2012, Huntington Beach, CA, USA, November 9-10, 2012. pages 33-40, IEEE Computer Society, 2012. [doi]

Abstract

Abstract is missing.