Fault modeling and test algorithm creation strategy for FinFET-based memories

Gurgen Harutyunyan, G. Tshagharyan, Valery A. Vardanian, Yervant Zorian. Fault modeling and test algorithm creation strategy for FinFET-based memories. In IEEE 32nd VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014. pages 1-6, IEEE, 2014. [doi]

Abstract

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