A 12.5Gb/s SerDes in 65nm CMOS Using a Baud-Rate ADC with Digital Receiver Equalization and Clock Recovery - researchr publication authors

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Mike Harwood, Nirmal Warke, Richard Simpson, Tom Leslie, Ajith Amerasekera, Sean Batty, Derek Colman, Eugenia Carr, Venu Gopinathan, Steve Hubbins, Peter Hunt, Andy Joy, Pulkit Khandelwal, Bob Killips, Thomas Krause, Shaun Lytollis, Andy Pickering, Mark Saxton, David Sebastio, Graeme Swanson, Andre Szczepanek, Terry Ward, Jeff Williams, Richard Williams, Tom Willwerth. A 12.5Gb/s SerDes in 65nm CMOS Using a Baud-Rate ADC with Digital Receiver Equalization and Clock Recovery. In 2007 IEEE International Solid-State Circuits Conference, ISSCC 2007, Digest of Technical Papers, San Francisco, CA, USA, February 11-15, 2007. pages 436-591, IEEE, 2007. [doi]

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