Omar Al-Terkawi Hasib, Daniel Crepeau, Thomas Awad, Andrei Dulipovici, Yvon Savaria, Claude Thibeault. Exploiting built-in delay lines for applying launch-on-capture at-speed testing on self-timed circuits. In 36th IEEE VLSI Test Symposium, VTS 2018, San Francisco, CA, USA, April 22-25, 2018. pages 1-6, IEEE Computer Society, 2018. [doi]
Abstract is missing.