At-Speed Built-in Test for Logic Circuits with Multiple Clocks

Kazumi Hatayama, Michinobu Nakao, Yasuo Sato. At-Speed Built-in Test for Logic Circuits with Multiple Clocks. In 11th Asian Test Symposium (ATS 2002), 18-20 November 2002, Guam, USA. pages 292-297, IEEE Computer Society, 2002. [doi]

Abstract

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