Measurements and analysis of SER tolerant latch in a 90 nm dual-Vt CMOS process

Peter Hazucha, Tanay Kamik, Steven Walstra, Bradley Bloechel, James Tschanz, Jose Maiz, Krishnamurthy Soumyanath, Greg Dermer, Siva Narendra, Vivek De, Shekhar Borkar. Measurements and analysis of SER tolerant latch in a 90 nm dual-Vt CMOS process. In Proceedings of the IEEE Custom Integrated Circuits Conference, CICC 2003, San Jose, CA, USA, September 21 - 24, 2003. pages 617-620, IEEE, 2003. [doi]

Abstract

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