Design issues in low-voltage high-speed current-mode logic buffers

Payam Heydari. Design issues in low-voltage high-speed current-mode logic buffers. In Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, Washington, DC, USA, April 28-29, 2003. pages 21-26, ACM, 2003. [doi]

Abstract

Abstract is missing.