Guan-Hao Hou, Wei-Chen Huang, Jiun-Lang Huang, Terry Kuo. Design and Implementation of an FPGA-Based 16-Channel Data/Timing Formatter. In 27th IEEE Asian Test Symposium, ATS 2018, Hefei, China, October 15-18, 2018. pages 209-214, IEEE, 2018. [doi]
Abstract is missing.