Behavioral synthesis with activating unused flip-flops for reducing glitch power in FPGA

Cheng-Tao Hsieh, Jason Cong, Zhiru Zhang, Shih-Chieh Chang. Behavioral synthesis with activating unused flip-flops for reducing glitch power in FPGA. In Proceedings of the 13th Asia South Pacific Design Automation Conference, ASP-DAC 2008, Seoul, Korea, January 21-24, 2008. pages 10-15, IEEE, 2008. [doi]

Abstract

Abstract is missing.