Failure Factor Based Yield Enhancement for SRAM Designs

Yu-Tsao Hsing, Chih-Wea Wang, Ching-Wei Wu, Chih-Tsun Huang, Cheng-Wen Wu. Failure Factor Based Yield Enhancement for SRAM Designs. In 19th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2004), 10-13 October 2004, Cannes, France, Proceedings. pages 20-28, IEEE Computer Society, 2004. [doi]

@inproceedings{HsingWWHW04,
  title = {Failure Factor Based Yield Enhancement for SRAM Designs},
  author = {Yu-Tsao Hsing and Chih-Wea Wang and Ching-Wei Wu and Chih-Tsun Huang and Cheng-Wen Wu},
  year = {2004},
  url = {http://csdl.computer.org/comp/proceedings/dft/2004/2241/00/22410020abs.htm},
  tags = {rule-based},
  researchr = {https://researchr.org/publication/HsingWWHW04},
  cites = {0},
  citedby = {0},
  pages = {20-28},
  booktitle = {19th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2004), 10-13 October 2004, Cannes, France, Proceedings},
  publisher = {IEEE Computer Society},
  isbn = {0-7695-2241-6},
}