Latch Clustering for Minimizing Detection-to-Boosting Latency Toward Low-Power Resilient Circuits

Chih-Cheng Hsu, Mark Po-Hung Lin, Masanori Hashimoto. Latch Clustering for Minimizing Detection-to-Boosting Latency Toward Low-Power Resilient Circuits. In Baris Taskin, Tsung-Yi Ho, editors, Proceedings of the 18th System Level Interconnect Prediction Workshop, SLIP 2016, Austin, TX, USA, June 4, 2016. ACM, 2016. [doi]

Abstract

Abstract is missing.