VLSI Hardware Architecture of Stochastic Low-rank Tensor Decomposition

Lingyi Huang, Chunhua Deng, Shahana Ibrahim, Xiao Fu 0001, Bo Yuan 0001. VLSI Hardware Architecture of Stochastic Low-rank Tensor Decomposition. In 55th Asilomar Conference on Signals, Systems, and Computers, ACSSC 2021, Pacific Grove, CA, USA, October 31 - November 3, 2021. pages 1176-1180, IEEE, 2021. [doi]

Abstract

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