FPGA Implementation of Pipelined On-Line Scheme for 3-D Vector Normalization - researchr publication

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Zhijun Huang, Milos D. Ercegovac. FPGA Implementation of Pipelined On-Line Scheme for 3-D Vector Normalization. In The 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2001, Rohnert Park, California, USA, April 29 - May 2, 2001. pages 61-70, IEEE, 2001. [doi]

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