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PAHLS: Towards Run-Time Synthesis for FPGAs

Renqiu Huang, Ranga Vemuri. PAHLS: Towards Run-Time Synthesis for FPGAs. In Tero Rissa, Steven J. E. Wilton, Philip Heng Wai Leong, editors, Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), Tampere, Finland, August 24-26, 2005. pages 739-740, IEEE, 2005.

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