Abstract is missing.
- Constraint Graph Analysis of Multithreaded ProgramsHarold W. Cain, Mikko H. Lipasti, Ravi Nair. 4-14 [doi]
- The Impact of Resource Partitioning on SMT ProcessorsSteven E. Raasch, Steven K. Reinhardt. 15-26 [doi]
- Initial Observations of the Simultaneous Multithreading Pentium 4 ProcessorNathan Tuck, Dean M. Tullsen. 26 [doi]
- Efficient Resource Management during Instruction Scheduling for the EPIC ArchitectureDong-yuan Chen, Lixia Liu, Chen Fu, Shuxin Yang, Chengyong Wu, Roy Dz-Ching Ju. 36-45 [doi]
- Instruction Replication: Reducing Delays Due to Inter-PE Communication LatencyAneesh Aggarwal, Manoj Franklin. 46-55 [doi]
- Y-Branches: When You Come to a Fork in the Road, Take ItNicholas J. Wang, Michael Fertig, Sanjay J. Patel. 56 [doi]
- Optimizing Program Locality Through CMEs and GAsXavier Vera, Jaume Abella, Antonio González, Josep Llosa. 68-78 [doi]
- Miss Rate Prediction across All Program InputsYutao Zhong, Steve Dropsho, Chen Ding. 79-90 [doi]
- Compiler-Directed Content-Aware Prefetching for Dynamic Data StructuresHassan Al-Sukhni, Ian Bratt, Daniel A. Connors. 91 [doi]
- Challenges and New Approaches to Program AnalysisMonica S. Lam. 102 [doi]
- Combining Program Recovery, Auto-Parallelisation and Locality Analysis for C Programs on Multi-Processor Embedded SystemsBjörn Franke, Michael F. P. O Boyle. 104-113 [doi]
- Inter-Procedural Loop Fusion, Array Contraction and RotationJohn Ng, Dattatraya Kulkarni, Wei Li, Robert Cox, Scott Bobholz. 114-124 [doi]
- Spill Code Minimization by Spill Code MotionAkira Koseki, Hideaki Komatsu, Toshio Nakatani. 125-134 [doi]
- Compilation, Architectural Support, and Evaluation of SIMD Graphics Pipeline Programs on a General-Purpose CPUMauricio Breternitz Jr., Herbert H. J. Hum, Sanjeev Kumar. 135 [doi]
- An Efficient Online Path Profiling Framework for Java Just-In-Time CompilersToshiaki Yasue, Toshio Suganuma, Hideaki Komatsu, Toshio Nakatani. 148-158 [doi]
- Compressing Extended Program Traces Using Value PredictorsMartin Burtscher, Metha Jeeradit. 159-168 [doi]
- Using Software Logging to Support Multi-Version Buffering in Thread-Level SpeculationMaría Jesús Garzarán, Milos Prvulovic, Víctor Viñals, José María Llabería, Lawrence Rauchwerger, Josep Torrellas. 170 [doi]
- Reactive Multi-Word Synchronization for MultiprocessorsPhuong Hoai Ha, Philippas Tsigas. 184-193 [doi]
- Design Trade-Offs in High-Throughput Coherence ControllersAnthony-Trung Nguyen, Josep Torrellas. 194-205 [doi]
- Memory Hierarchy Design for a Multiprocessor Look-up EngineJean-Loup Baer, Douglas Low, Patrick Crowley, Neal Sidhwaney. 206 [doi]
- Biomedical Computing and VisualizationChris Johnson. 218 [doi]
- Characterizing and Predicting Program Behavior and its VariabilityEvelyn Duesterwald, Calin Cascaval, Sandhya Dwarkadas. 220-231 [doi]
- Redeeming IPC as a Performance Metric for Multithreaded ProgramsKevin M. Lepak, Harold W. Cain, Mikko H. Lipasti. 232-243 [doi]
- Picking Statistically Valid and Early Simulation PointsErez Perelman, Greg Hamerly, Brad Calder. 244 [doi]
- Reducing Datapath Energy through the Isolation of Short-Lived OperandsDmitry Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose. 258-268 [doi]
- Resolving Register Bank Conflicts for a Network ProcessorXiaotong Zhuang, Santosh Pande. 269 [doi]