Single-chip multi-processor integrating quadruple 8-way VLIW processors with interface timing analysis considering power supply noise

Satoshi Imai, Atsuki Inoue, Motoaki Matsumura, Kenichi Kawasaki, Atsuhiro Suga. Single-chip multi-processor integrating quadruple 8-way VLIW processors with interface timing analysis considering power supply noise. In Fumiyasu Hirose, editor, Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006. pages 541-546, IEEE, 2006. [doi]

Abstract

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