Verilog2SMV: A tool for word-level verification

Ahmed Irfan, Alessandro Cimatti, Alberto Griggio, Marco Roveri, Roberto Sebastiani. Verilog2SMV: A tool for word-level verification. In Luca Fanucci, Jürgen Teich, editors, 2016 Design, Automation & Test in Europe Conference & Exhibition, DATE 2016, Dresden, Germany, March 14-18, 2016. pages 1156-1159, IEEE, 2016. [doi]

Abstract

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