High density bit-serial FPGA with LUT embedding shift register function

Tsuyoshi Isshiki, Akihisa Ohta, T. Watanabe, T. Nakada, K. Akahane, I. Sisla, Dongju Li, Hiroaki Kunieda. High density bit-serial FPGA with LUT embedding shift register function. In IEEE Asia Pacific Conference on Circuits and Systems 2002, APCCAS 2002, Singapore, 16-18 December 2002. pages 475-480, IEEE, 2002. [doi]

Abstract

Abstract is missing.