Hierarchical 3D interconnection architecture with tightly-coupled processor-memory integration - researchr publication authors

researchr

You are not signed in
Sign in
Sign up

Kiyoto Ito, Makoto Saen, Kenichi Osada, Tomoyuki Kodama, Hiroyuki Mizuno. Hierarchical 3D interconnection architecture with tightly-coupled processor-memory integration. In IEEE International Conference on 3D System Integration, 3DIC 2010, Munich, Germany, 16-18 November 2010. pages 1-6, IEEE, 2010. [doi]

This author has not been identified. Look up 'Kiyoto Ito' in GoogleThis author has not been identified. Look up 'Makoto Saen' in GoogleThis author has not been identified. Look up 'Kenichi Osada' in GoogleThis author has not been identified. Look up 'Tomoyuki Kodama' in GoogleThis author has not been identified. Look up 'Hiroyuki Mizuno' in Google

runs on WebDSL