Researchr is a web site for finding, collecting, sharing, and reviewing scientific publications, for researchers by researchers.
Sign up for an account to create a profile with publication list, tag and review your related work, and share bibliographies with your co-authors.
Niichi Itoh, Yuka Naemura, Hiroshi Makino, Yasunobu Nakase, Tsutomu Yoshihara, Yasutaka Horiba. A 600-MHz 54/spl times/54-bit multiplier with rectangular-styled Wallace tree. J. Solid-State Circuits, 36(2):249-257, 2001. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: A 32×24-bit multiplier-accumulator with advanced rectangular styled Wallace-tree structureNiichi Itoh, Yasumasa Tsukamoto, Takeshi Shibagaki, Koji Nii, Hidehiro Takata, Hiroshi Makino. iscas 2005: 73-76 [doi]
The following publications are possibly variants of this publication: