Tsuyoshi Iwagaki, Takehiro Mikami, Hideyuki Ichihara, Tomoo Inoue. Utilizing register transfer level false paths for circuit optimization with a logic synthesis tool. In 2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012, Kaohsiung, Taiwan, December 2-5, 2012. pages 615-618, IEEE, 2012. [doi]
Abstract is missing.