An energy-efficient FPGA-based soft-core processor with a configurable word size ECC arithmetic accelerator

Aiko Iwasaki, Yuichiro Shibata, Kiyoshi Oguri, Ryuichi Harasawa. An energy-efficient FPGA-based soft-core processor with a configurable word size ECC arithmetic accelerator. In 2015 IEEE Symposium in Low-Power and High-Speed Chips, COOL CHIPS XVIII, Yokohama, Japan, April 13-15, 2015. pages 1-3, IEEE, 2015. [doi]

Abstract

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