Reducing transistor count in clocked standard cells with ambipolar double-gate FETs

Kotb Jabeur, David Navarro, Ian O'Connor, Pierre-Emmanuel Gaillardon, M. Haykel Ben Jamaa, Fabien Clermidy. Reducing transistor count in clocked standard cells with ambipolar double-gate FETs. In Shamik Das, Iris Bahar, Michael T. Niemier, editors, 2010 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2010, Anaheim, CA, USA, June 17-18, 2010. pages 47-52, IEEE Computer Society, 2010. [doi]

Abstract

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