Multilevel Factorization Technique for Pass Transistor Logic

Arunita Jaekel, Graham A. Jullien, Subir Bandyopadhyay. Multilevel Factorization Technique for Pass Transistor Logic. In 9th International Conference on VLSI Design (VLSI Design 1996), 3-6 January 1996, Bangalore, India. pages 339-340, IEEE Computer Society, 1996. [doi]

Abstract

Abstract is missing.