Manish Kumar Jaiswal, Hayden Kwok-Hay So. Dual-mode double precision / two-parallel single precision floating point multiplier architecture. In 2015 IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2015, Daejeon, South Korea, October 5-7, 2015. pages 213-218, IEEE, 2015. [doi]
Abstract is missing.