Simultaneous clock buffer sizing and polarity assignment for power/ground noise minimization

Hochang Jang, Taewhan Kim. Simultaneous clock buffer sizing and polarity assignment for power/ground noise minimization. In Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009. pages 794-799, ACM, 2009. [doi]

Abstract

Abstract is missing.