A 9-Bit 10-MHz 28-µW SAR ADC Using Tapered Bit Periods and a Partially Interdigitated DAC

Devon Janke, Andrew Monk, Eric Swindlehurst, Kent D. Layton, Shiuh-Hua Wood Chiang. A 9-Bit 10-MHz 28-µW SAR ADC Using Tapered Bit Periods and a Partially Interdigitated DAC. IEEE Trans. on Circuits and Systems, 66(2):187-191, 2019. [doi]

Abstract

Abstract is missing.