New Fault Models and Self-Test Generation for Microprocessors Using High-Level Decision Diagrams

Artjom Jasnetski, Jaan Raik, Anton Tsertov, Raimund Ubar. New Fault Models and Self-Test Generation for Microprocessors Using High-Level Decision Diagrams. In Zoran Stamenkovic, Witold A. Pleskacz, Jaan Raik, Heinrich Theodor Vierhaus, editors, 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015. pages 251-254, IEEE, 2015. [doi]

Abstract

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