Marcus Jeitler, Jakob Lechner, Andreas Steininger. Enhancing pipelined processor architectures with fast autonomous recovery of transient faults. In Elena Gramatová, Zdenek Kotásek, Andreas Steininger, Heinrich Theodor Vierhaus, Horst Zimmermann, editors, 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2010, Vienna, Austria, April 14-16, 2010. pages 233-236, IEEE, 2010. [doi]
Abstract is missing.