Optimal design of dummy ball array in wafer level package to improve board level thermal cycle reliability (BLR)

Seongwon Jeong, Jinseok Kim 0005, Ayoung Kim, Byungwook Kim, Moonsoo Lee, Jaewon Chang, In Hak Baick, Hanbyul Kang, Younggeun Ji, Sangchul Shin, Sangwoo Pae. Optimal design of dummy ball array in wafer level package to improve board level thermal cycle reliability (BLR). In IEEE International Reliability Physics Symposium, IRPS 2018, Burlingame, CA, USA, March 11-15, 2018. pages 3, IEEE, 2018. [doi]

Abstract

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