Engineering of An Assertion-based PSL:::Simple:::-Verilog Dynamic Verifier by Alternating Automata

Naiyong Jin, Chengjie Shen, Jun Chen, Taoyong Ni. Engineering of An Assertion-based PSL:::Simple:::-Verilog Dynamic Verifier by Alternating Automata. Electronic Notes in Theoretical Computer Science, 207:153-169, 2008. [doi]

Abstract

Abstract is missing.