Jaehong Jung, Kyungmin Lee, Gunwoo Kong, Baekmin Lim, Seungjin Kim, Seunghyun Oh, Jongwoo Lee. A 2.4-to-4.2GHz 440.2fsrms-Integrated-Jitter 4.3mW Ring-Oscillator-Based PLL Using a Switched-Capacitor-Bias-Based Sampling PD in 4nm FinFET CMOS. In 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), Kyoto, Japan, June 11-16, 2023. pages 1-2, IEEE, 2023. [doi]
@inproceedings{JungLKLKOL23,
title = {A 2.4-to-4.2GHz 440.2fsrms-Integrated-Jitter 4.3mW Ring-Oscillator-Based PLL Using a Switched-Capacitor-Bias-Based Sampling PD in 4nm FinFET CMOS},
author = {Jaehong Jung and Kyungmin Lee and Gunwoo Kong and Baekmin Lim and Seungjin Kim and Seunghyun Oh and Jongwoo Lee},
year = {2023},
doi = {10.23919/VLSITechnologyandCir57934.2023.10185300},
url = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185300},
researchr = {https://researchr.org/publication/JungLKLKOL23},
cites = {0},
citedby = {0},
pages = {1-2},
booktitle = {2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), Kyoto, Japan, June 11-16, 2023},
publisher = {IEEE},
isbn = {978-4-86348-806-9},
}