Chi-Chou Kao, Yen-Tai Lai. Area-minimal algorithm for LUT-based FPGA technology mapping with duplication-free restriction. In Masaharu Imai, editor, Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, Yokohama, Japan, January 27-30, 2004. pages 719-724, IEEE, 2004. [doi]
Abstract is missing.