Replica bias scheme for efficient power utilization in high-frequency CMOS digital circuits

Saravanan Kathiah, Sankaran Aniruddhan. Replica bias scheme for efficient power utilization in high-frequency CMOS digital circuits. In IEEE International Symposium on Circuits and Systemss, ISCAS 2014, Melbourne, Victoria, Australia, June 1-5, 2014. pages 1002-1005, IEEE, 2014. [doi]

Abstract

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