Kazushi Kawamura, Sho Tanaka, Masao Yanagisawa, Nozomu Togawa. A partial redundant fault-secure high-level synthesis algorithm for RDR architectures. In 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), Beijing, China, May 19-23, 2013. pages 1736-1739, IEEE, 2013. [doi]
Abstract is missing.