Georg J. Kempa, Peter Jung. FPL Based Logic Synthesis of Squarers Using VHDL. In Herbert Grünbacher, Reiner W. Hartenstein, editors, Field-Programmable Gate Arrays: Architectures and Tools for Rapid Prototyping, Second International Workshop on Field-Programmable Logic and Applications, Vienna, Austria, August 31 - September 2, 1992, Selected Papers. Volume 705 of Lecture Notes in Computer Science, pages 112-123, Springer, 1992.
Abstract is missing.